PMIC – Low Dropout (LDO) Regulators

Index
1. Introduction
2. Device
3. Compensation Skills
4. Design Consideration

1. Introduction

LDO regulator is a type of linear DC-DC converter that has low quiescent current, wide bandwidth, and typically low power efficiency. The basic LDO regulator is shown below:

The structure features a two-stage feedback loop to control V_IN-V_OUT characteristic. Take V_IN = 12V, V_REF = 1.2V, and R₄/(R₄ + R₅) = 1.2/5 for example, the error amplifier (EA) forces the positive input to 1.2V and hence V_OUT = 5V. Any change in the V_OUT will cause EA to adjust the gate voltage of the PMOS. Consequently, the current through the PMOS counters the change in V_OUT and fixes V_OUT to 5V.

2. Device

Let us consider the transistor devices we can use at EA output. BJTs have higher dropout voltage and a considerable amount of leakage current through their base terminal, hence they are not suitable for LDO. MOSFETs on the other hand have a low dropout voltage and almost no leakage current, which make them the choice as LDO power transistor. However, a drawback of MOSFETs is that they require larger size/area comparing to BJTs due to their lower current driving capability.